PRINCE GEORGE'S COMMUNITY COLLEGE
Department of Physical Science and Engineering
Engineering Program
Welcome to Introductory Digital Logic Design!
EGR2440 - Digital Logic Design
Number LE01
Fall 2017

INSTRUCTOR: Dr. Scott D. Johnson, Associate Professor, Engineering Coordinator, Physical Sciences and Engineering

OFFICE: Official office is CAT-229R; but unofficial office is CAT-305 (better place to find me)

OTHER LOCATIONS: CH-100 (Department), the classroom proper, and the Cyber Cafe

PHONE NUMBERS:301-546-0420 (Department Main Line) or 301-386-7536 (Office)

E-MAIL ADDRESS: sdjohnson@pgcc.edu

To facilitate e-mail communication with me, please include the following information: The course designation (EGR 2440) in the subject of any e-mails to me during the Fall 2017 semester. Note: All credit students (with the exception of Howard Community College students enrolled at Laurel College Center) are required to use Owl Mail for all college communication.

Example: EGR2440: Need help on VHDL

ENGINEERING PROGRAM'S WEB PAGE: http://academic.pgcc.edu/engineering

WEB PAGE: http://academic.pgcc.edu/~sjohnson

OFFICE HOURS: MW 5:30-6:00pm; TTh 5:45-6:30pm and 8:00-9:00pm, by appointment all other times

Note: Part or all of the office hours might be in the classroom (CAT-305) as student questions warrant.

COURSE DESCRIPTION:

To understand modern electrical circuits a thorough understanding of digital circuits is necessary. This course works towards that goal by introducing the student to the theory and practice of logic (digital) circuits.

Material that is covered includes but is not limited to the following subjects: Number systems and base conversions, Boolean algebra, truth tables,logic circuits, logic circuits synthesis and implementation, Karnaugh maps (and other strategies of minimization), sequential logic, flip-flops, registers, counters, processors (simple), programmable logic devices, and characteristics of logic families. Some physical hardware is discussed including limitations.

This course emphasizes the elements used to create logic circuits and the software (CAD/EDA) used to design and simulate logic circuits.

Team work along with communication skills (oral, written, and graphical) are exercised throughout the course.

PREREQUISITES:

PHY 1030, MAT 2420, and EGR 1010

CREDIT HOUR EXPLANATION:

In the Engineering program at Prince George's Community College, for all credit course, students are expected to spend a minimum of 45 combined hours of instructional time and related coursework time per credit hour. This course is a 3 credit course with a portion of that credit being laboratory. This course achieves the minimum of 135 hours of instructional time by requiring 18.75 hours of instructional time, 18.75 hours of laboratory time and 97.5 hours of student work outside of instructional time. Minimum outside instructional time assumes the student is aiming for a C, not an A.

COURSE LEARNING OUTCOMES:

  • Students passing this course will be able to accomplish all of the outcomes listed below.
  • Students will demonstrate their attainment of these outcomes through the planned assessments. So, for each course learning outcome, indicate briefly the planned assessment tools, such as cases, essay, multiple choice questions, etc.
  • Courses seeking general education status must address all pertinent general education outcomes in the below alignment.

Upon successful completion of the course a student will be able to:


Course Outcome

Program Outcome #

MO#

Planned Assessment

Describe and apply fundamental circuit elements in a design of a simple logic circuit

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Examination

Identify and describe logic building blocks

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Examination

Demonstrate the ability to understand specification sheets

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Examination and project

Effectively design, build, and analyze logic circuits (combinational and synchronous at a minimum).

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Project

Use a simulation tool to design and analyze the performance of a logic circuit of moderate complexity.

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Project

Sketch a digital system design of a complex logic circuit.

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Examination and project

Demonstrate the ability to write and execute a timing simulation.

1,2,3,4,5,6,7

1.1,1.3,1.4,2.1,2.2,2.3,3.1,4.1,4.2,4.3

Examination and project

REQUIRED TEXTBOOKS:

Fundamentals of Digital Logic with VHDL Design with CD-ROM 3rd Edition.  Brown, Stephen and Vranesic, Zvonko.  McGraw-Hill (2008).
Schaum's Outline of Digital Principles 3rd Edition.  Tokheim, Roger L.  McGraw-Hill (1994).

Recommended books:

Pocket Book for Technical Writing for Engineers and Scientists 3rd Edition .  Finkelstein, Leo.  McGraw-Hill (2007).

OTHER REQUIRED COURSE MATERIALS:

  • Pens, Pencils, Eraser, Straight edge, Paper, Textbooks, and Calculator are required for every class.

OUTSIDE CLASS REQUIREMENTS:

As with any class an amount of time at least equivalent to two times the credit hours is expected to be performed for homework and labs. Please allot sufficient time for homework.

Homework will be assigned each week including the first week.

GRADING CRITERIA:

Evaluation of student performance is to be based on:

  1. Unannounced quizzes and homework will account for approximately 20% of the semester grade. Homework consists of essays that are to be written in standard English format and problem sets. A grade of zero will be given to anyone who copies their homeworks (or quizzes from neighboring students). All work is subject to re-grade if academic dishonesty is suspected. Turn work in on time.

  2. Two (mid-term and final) comprehensive in-class tests on digital circuits will account for approximately 20% total of the semester grade. Using other resources (students next to you, computers of any type) is considering cheating and a grade of zero will be given to the student. All work is subject to re-grade if academic dishonesty is suspected.

  3. A design logic project with associated report will account for approximately 35% of the semester grade. This project is to be an original individual work. A grade of zero will be given to anyone who copies their projects. All work is subject to re-grade if academic dishonesty is suspected. Turn work in on time.

  4. An essay surveying the material in the course. This essay is to include not just the methods but a practical guide on when to use the different digital methods and digital logical blocks. This is worth approximately 25% of the semester grade.This project is to be an original individual work. A grade of zero will be given to anyone who copies their projects. All work is subject to re-grade if academic dishonesty is suspected. You must turn this in on time, NO exceptions.

The scale used for grades in this class is the "Modern Standard Grading Scale" as defined in the COLLEGE RESOURCES and SERVICES link below.

NA and FX GRADES:

There are no Q grades any more; they have been replaced with "NA Grade" and "FX Grade."

The NA GRADE may be assigned by the faculty member to any student on the roster who never attends or academically participates in the class during the first three weeks of class (or equivalent of 20 percent in short courses).

The FX GRADE may be assigned by the faculty member to any student on the roster who did not officially withdraw from the course but who failed to participate in course activities through the end of the period. It is used when, in the opinion of the instructor, completed assignments or course activities or both were insufficient to make normal evaluation of academic performance possible.

WITHDRAWAL STATEMENT

As the semester continues, I hope to see all of you staying in my course and doing well. However, if you are considering withdrawing from this course, your withdrawal may result in financial aid and /or academic standing implications. Therefore, if you are considering withdrawing at any point, please speak with me before making a final decision. I may be able to offer to direct you to help. If I am unavailable, please contact Mark Hubley via email at hubleymj@pgcc.edu or telephone at 301-322-0420.

HOW ASSIGNMENTS ARE TO BE SUBMITTED:

  1. Homework is due at the start of class (or before) except for in-class projects.

  2. Laboratory work is to be submitted in appropriate binders follow any standard laboratory format (this will be reviewed in class).

  3. Make-up homework, quizzes, and/or tests are up to the discretion of the teacher (excused absences only). No makeup will be possible for laboratory work, sufficient time should be available to recover if an absence is necessary.

COURSE OUTLINE

New topics are to be covered each week and include but are not limited to the following subjects. This outline is subject to change.

Week 1 Digital Design

Week 2 Logic Circuits

Week 3 CAD/VHDL coding (instructional; expected to use after this)

Week 4 Implementation Technology

Week 5 Logic function optimization

Week 6 Arithmetic Circuits

Week 7 Multiplexers, Decoders, Encoders, and other logic circuit building blocks

Week 8 Flip-flops, registers, counters, and other logic circuit building blocks

Week 9 Synchronous Sequential Circuits

Week 10 Asynchronous Sequential Circuits

Week 11 Digital System Design: Putting it all together

Week 12 Digital System Design (state diagrams)

Week 13 Testing of Logic Circuits (+project help)

Week 14 Testing of Logic Circuits (+project help)

Week 15 CAD/EDA Tools

A new chapter should be read each week usually following the title of the topic above. Problems will be based off of the reading.

Quizzes will all be unannounced so be prepared.

Tests will be announced a week before and will depend on our progress in the classroom.

CLASSROOM POLICIES:

  1. Food and drink in limited quantities (snacks, not meals) are permitted in restricted areas (not near electronics) and will be revoked if proper cleanliness is found wanting.

  2. Cell phones must be in vibrate mode and are only to be answered for emergencies (step outside please).

  3. Common courtesy is to apply at all times.

IMPORTANT DATES:


Labor Day - College closed - No classes

Sat.-Mon., September 2 - September 4

Last day to apply for fall graduation

Friday, September 15

Last day to change from "audit to credit" or "credit to audit" for full-semester classes

Friday, September 22

Early Advising Week begins for STEM

Mon. - Fri., October 9 - October 13

Midterm - middle of semester; class will speed up

Wednesday, October 18

College Enrichment Day - No classes (for students; NOT faculty)

Tuesday, October 24

Registration begins

Monday, November 6

Last day to withdraw from full-semester classes

Friday, November 17

Thanksgiving Break Start - No classes

Wed., November 23

College closed - no classes

Thurs.-Sun., Nov. 24 - Nov. 27

Last Day of Regular Classes

Sunday, December 10

Final exam period/last week of classes

Thursday, December 14

Winter Break - College closed

Thursday-Tuesday, December 21 - January 2

LAB INFORMATION

Lab is in class (CAT-305) during class and after class during open hour lab periods.

COLLEGE RESOURCES and SERVICES