**PRINCE GEORGE'S COMMUNITY COLLEGE**

**Department of Physical Science and Engineering**

**Engineering Program****
Welcome to Introductory Digital Logic Design!**

EGR2440 - Digital Logic Design

Number LE01

**INSTRUCTOR**:
Dr. Scott D. Johnson, Associate Professor, Engineering Coordinator,
Physical Sciences and Engineering

**OFFICE**:
CAT-229R

**OTHER
LOCATIONS: **CH-100 (Department), the classroom proper, and the Cyber Cafe

**PHONE
NUMBERS**: 301-322-0420 (Department Main Line) or 301-386-7536 (Office)

**E-MAIL ADDRESS:
sdjohnson@pgcc.edu**

To facilitate e-mail communication with me, please include the following
code: **CCGP07 along with
the course designation (EGR 2440) **in
the *subject* of any e-mails to me during the Fall 2010
semester. (The code stops legitimate e-mail messages from being evaluated wrongly
as SPAM but does not allow e-mails that contain a virus or illegal attachment
into our network.)

*Example:*
EGR2440: Need help on VHDL: CCGP07

**
All credit students (with the exception of Howard Community College students
enrolled at Laurel College Center) are required to use Owl Mail for
all college communication.
**

**ENGINEERING PROGRAM'S WEB PAGE**: *
http://academic.pgcc.edu/~sjohnson/engineering.html*

**WEB PAGE**: *http://academic.pgcc.edu/~sjohnson*

**
OFFICE HOURS**: MW 7:15-8:30pm, TTH 2:15-3:30pm, by appointment all other times

**
COURSE DESCRIPTION**:

Introduction to the theory and practice of logic (digital) circuits in
order to foster an understanding of modern electrical circuits.
Includes but is not limited to the following subjects: Number systems
and base conversions; Boolean algebra, truth tables, logic circuits,
logic circuits synthesis and implementation, Karnaugh maps
(and other strategies of minimization), sequential logic, flip-flops,
registers, counters, processors (simple), programmable logic devices
and characteristics of logic families. Some physical hardware is
discussed including limitations.

This course emphasizes the elements used to create logic circuits and
the software (CAD/EDA) used to design and simulate logic circuits.

Team work along with communication skills (oral, written, and graphical)
are exercised throughout the course.

**PREREQUISITES**:

PHY 1030, MAT 2420, EGR 1010 and some knowledge of computer programming (EGR 1140 would be helpful; need to make this up if you don't have it).

**COURSE LEARNING OUTCOMES:**

Upon successful completion of the course a student will be able to

Describe and apply fundamental circuit elements in a design of a simple logic circuit.

Identify and describe logic building blocks.

Demonstrate the ability to understand specification sheets.

Effectively design, build, and analyze logic circuits (combinational and synchronous at a minimum).

Use a simulation tool to design and analyze the performance of a logic circuit of moderate complexity.

Sketch a digital system design of complex logic circuit.

Demonstrate the ability to write and execute a timing simulation.

**REQUIRED TEXTBOOKS: **

*
Fundamentals of Digital Logic with VHDL Design with CD-ROM
3^{rd} Edition.*
Brown, Stephen and Vranesic, Zvonko. McGraw-Hill
(2008).

**
RECOMMENDED BOOKS: **

**
Pocket Book for Technical Writing for Engineers and Scientists
**3^{rd} Edition** .** Finkelstein, Leo. McGraw-Hill
(2007).

MATLAB DeMystified. McMahon, David. McGraw-Hill(2007).

**
OTHER REQUIRED COURSE MATERIALS: **

Pens, Pencils, Eraser, Straight edge, Paper, Textbooks, and Calculator are required for every class.

**
OUTSIDE CLASS REQUIREMENTS: **

As with any class an amount of time at least equivalent to two times the credit hours is expected to be performed for homework and labs. Please allot sufficient time for homework.

Homework will be assigned each week including the first week.

**
GRADING CRITERIA:**

Evaluation of student performance is to be based on:

Unannounced quizzes and homework will account for approximately 25% of the semester grade. Homework consists of essays that are to be written in standard English format and problem sets.

Two (mid-term and final) comprehensive in-class tests on digital circuits will account for approximately 25% (each) of the semester grade. All work is subject to re-grade if academic dishonesty is suspected.

A design logic project with associated report will account for approximately 25% of the semester grade. This project is to be an original individual work. A grade of zero will be given to anyone who copies their projects. All work is subject to re-grade if academic dishonesty is suspected. Turn work in on time.

**Q GRADES: **

Students are expected to attend and participate in class activities. Students who either never attended the class or who ceased attendance during the first 20 percent of the course will be assigned a "Q" grade by the instructor. The Q grade is a final grade and will not be replace with a different grade at a later time. Although the Q grade will not impact students' GPA, the issuanc of a Q grade will likely decrease students' financial aid awards.

**HOW ASSIGNMENTS ARE TO BE SUBMITTED: **

Homework is due at the start of class (or before) except for in-class projects.

Laboratory work is to be submitted in appropriate binders follow any standard laboratory format (this will be reviewed in class).

Make-up homework, quizzes, and/or tests are up to the discretion of the teacher (excused absences only). No makeup will be possible for laboratory work, sufficient time should be available to recover if an absence is necessary.

**COURSE
OUTLINE**

New topics are to be covered each week and include but are not limited to the following subjects. This outline is subject to change.

Week 1 Digital Design

Week 2 Logic Circuits

Week 3 CAD/VHDL coding

Week 4 Implementation Technology

Week 5 Logic function optimization

Week 6 Arithmetic Circuits

Week 7 Multiplexers, Decoders, Encoders, and other logic circuit building blocks

Week 8 Flip-flops, registers, counters, and other logic circuit building blocks

Week 9 Synchronous Sequential Circuits

Week 10 Asynchronous Sequential Circuits

Week 11 Digital System Design: Putting it all together

Week 12 Digital System Design

Week 13 Testing of Logic Circuits:

Week 14 Testing of Logic Circuits

Week 15 CAD/EDA Tools

A new chapter should be read each week usually following the title of the topic above. Problems will be based off of the reading.

Quizzes will all be unannounced so be prepared.

Tests will be announced a week before and will depend on our progress in the classroom.

**CLASSROOM POLICIES:**

Food and drink in limited quantities (snacks, not meals) are permitted in restricted areas (not near electronics) and will be revoked if proper cleanliness is found wanting.

Cell phones must be in vibrate mode and are only to be answered for emergencies (step outside please).

Common courtesy is to apply at all times.

**IMPORTANT DATES:**

First Day of classes |
Mon., August 30 |

Labor Day - College closed - No classes |
Sat.-Mon., September 4 - September 6 |

Last day to apply for fall graduation |
Wednesday, September 15 |

Last day to change from "audit to credit" or "credit to audit" for full-semester classes |
Friday, September 24 |

Midterm - middle of semester; class will speed up |
Monday, October 25 |

College Enrichment Day - No classes (for students) |
Tuesday, October 26 |

Last day to withdraw from full-semester classes |
Friday, November 19 |

Thanksgiving Break Start - No classes |
Wed., November 24 |

College closed - no classes |
Thurs.-Sun., November 25-28 |

Last Day of Classes |
Thursday, December 9 |

Final exam period/last week of classes |
Wednesday, December 15 (6:00pm) |

Open Registration begins (Engineers should register NOW) |
December 2 |

Winter Break - College closed |
Wednesday - Tuesday, December 22 - January 4 |

Registration begins (Engineers should have registered already...if you have not; do it NOW) |
Wednesay, January 5 |

Classes begin Spring 2011 |
Monday, January 24 |

**LAB INFORMATION **

Computer programming maybe done in class (CAT-305) on the portable PCs during designated time periods.